디지털집적회로 inverter 설계도 및 시뮬레이션 결과

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디지털집적회로 inverter 설계도, 사이즈 및 시뮬레이션 결과

목차

0. Description of my design

1. [DC analysis]
1) Switching threshold voltage (Vs) = VDD/2
2) Vs = lower than VDD/2
3) Vs = higher than VDD/2

2. [Transient analysis 1]
1) Propagation delays (tPHL and tPLH) with PMOS/NMOS size ratio = 1.4335
2) tPHL and tPLH with PMOS/NMOS size ratio = 1
3) propagation delays (tPHL and tPLH) with PMOS/NMOS size ratio = 2

3. [Transient analysis 2]

본문내용

There are various type of inverters, resistive-load inverter, NMOS-load inverter, Complimentary MOS (CMOS) inverter, and Pseudo-NMOS inverter. Among them, I chose CMOS inverter because another type of inverters has some problems like narrow noise margin or static power consumption. CMOS logic has wider noise margin and lower power consumption, so is the basis of most gates in integrated circuit design today. I also used CMOS logic for my inverter design for that reason.

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